Signed Numbers and Two's Complement
Three ways to write −5, and only one of them lets the adder you already built be correct.
Skip to the animationNegative numbers are represented by reassigning some of the available bit patterns, and two's complement is the assignment for which ordinary unsigned addition already gives the correct signed answer — which is why it costs no extra hardware and why every processor uses it.
The problem
Four bits give sixteen patterns. Read as unsigned they are 0 to 15. There is no seventeenth pattern to spend on a minus sign, so any scheme for negatives must reassign existing patterns, trading range for sign.
Sign-and-magnitude, and why it loses
Put the sign in the top bit and the magnitude in the rest: 0101 is +5, 1101 is −5. It is the most readable scheme, and it has two fatal problems.
- Two zeros.
0000is +0 and1000is −0, so a pattern is wasted and a test for zero needs two comparisons. - Addition does not work. Add the patterns for +5 and −3 and you get nonsense. The hardware must inspect both signs, compare magnitudes, subtract the smaller from the larger and then set the sign — a comparator and a subtractor on top of the adder.
The objection is not aesthetic. The representation costs real circuits, and circuits are precisely the thing being economised.
Two's complement
To negate: invert every bit and add one. 0101 (+5) becomes 1010, then 1011 (−5). Applying it twice returns the original, as a negation should.
| Pattern | As unsigned | As two's complement |
|---|---|---|
| 0000 | 0 | 0 |
| 0111 | 7 | +7 |
| 1000 | 8 | −8 |
| 1011 | 11 | −5 |
| 1111 | 15 | −1 |
There is exactly one zero, so all sixteen patterns are distinct values: −8 to +7. The range is asymmetric because zero occupies a pattern on the non-negative side, leaving one more negative value than positive — so −(−8) overflows in four bits, which is a real and occasionally surprising edge case.
Why the hardware ends up simple
An n-bit register is inherently arithmetic modulo 2ⁿ. Two's complement is precisely the representation in which that modular arithmetic agrees with signed arithmetic, so the ordinary unsigned adder is already correct and the carry out of the top bit is simply discarded.
- One adder handles signed and unsigned addition identically.
- Subtraction is
a + (−b), so no subtractor exists — only inverters and a forced carry-in. - Comparison is a subtraction followed by a flag test.
Carry and overflow are different things
| Example | Carry out? | Overflow? |
|---|---|---|
| 0111 + 0001 = 1000 (+7 + 1 = −8) | No | Yes |
| 1111 + 0001 = 10000 (−1 + 1 = 0) | Yes | No |
| 0010 + 0011 = 0101 (2 + 3 = 5) | No | No |
Carry means the unsigned result did not fit; overflow means the signed result did not. They are independent flags. Overflow is exactly the case where the carry into the sign bit differs from the carry out of it — equivalently, adding two same-signed numbers and getting the other sign.
Sign extension
To widen a two's complement value, replicate the sign bit: 1011 (−5) becomes 1111 1011, still −5. Padding with zeros would give 0000 1011 = +11.
This is why instruction sets carry separate sign-extending and zero-extending loads, and why mixing int with unsigned in C produces some of the most durable bugs in the language.
The numbers you will be asked for
- Two's complement negation
−A = A′ + 1
Invert every bit, then add one.
- Value of a pattern
−aₙ₋₁·2ⁿ⁻¹ + Σ aᵢ·2ⁱ
The top bit carries a negative weight; all others positive.
- Range
−2ⁿ⁻¹ to +2ⁿ⁻¹ − 1
Asymmetric, because zero sits on the non-negative side.
- Overflow condition
carry_in(MSB) ⊕ carry_out(MSB)
One XOR gate computes it.
- Subtraction
A − B = A + B′ + 1
n XOR gates and a forced carry-in turn an adder into a subtractor.
Advantages and disadvantages
Advantages
- One zero, so every pattern is a distinct value and a zero test is one comparison.
- The unsigned adder is already correct for signed values.
- Subtraction needs no subtractor at all.
- Widening is done by replicating a single bit.
Disadvantages
- The range is asymmetric, so negating the most negative value overflows.
- It is less readable to a human than sign-and-magnitude.
- Overflow must be detected separately from carry, and the two are easily confused.
- Zero-padding a negative value silently turns it into a large positive one.
Watch it work
Check yourself
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